The present invention relates to methods of making semiconductor packages, and more particularly, to a method of making a semiconductor package with a heat spreader, which can enhance heat-dissipating efficiency.
How to efficiently dissipate heat generated by a semiconductor chip in operation and to assure lifetime and quality of a semiconductor package having the semiconductor chip encapsulated therein, has always been one critical topic to investigate in semiconductor industry.
Accordingly U.S. Pat. No. 5,726,079 discloses a semiconductor package shown in FIG. 8. This conventional semiconductor package 1 has a heat spreader 11 directly mounted on a semiconductor chip 10, with a top surface 110 of the heat spreader 11 being exposed to outside of an encapsulant 12 that encapsulates the chip 10. Due to the direct attachment of the heat spreader 11 to the chip 10, and the exposed top surface 110 of the heat spreader 11 in direct in contact with the atmosphere, thus heat generated by the chip 10 can be directly transmitted to the heat spreader 11 for being dissipated to the atmosphere. Such a heat dissipating path needs not to go through the encapsulant 12, thereby making the semiconductor package 1 good in heat dissipation.
However, there are several drawbacks for fabricating such a semiconductor package 1. First, when the chip 10 attached with the heat spreader 11 is placed in a molding cavity in a molding process, the top surface 110 of the heat spreader 11 is supposed to abutting a top wall of the molding cavity, so as to avoid the occurrence of flash on the top surface 110 of the heat spreader 11. If the top surface 110 of the heat spreader 11 cannot closely abut the top wall of the molding cavity with a gap being formed therebetween, thus a molding compound used for forming the encapsulant 12 flashes through the gap on the top surface 110 of the heat spreader 11. The flashes occurred on the heat spreader 11 not only deteriorate heat dissipating efficiency, but also impair appearance of the fabricated product. As a result, a deflash process is often required subsequently. However, this deflash process is time consuming and cost ineffective, and also possibly damages the fabricated product. On the other hand, if the heat spreader 11 too closely abuts the top wall of the molding cavity, damage to the chip 10 possibly occurs due to excessive abutting force.
Moreover, an adhesive or laminating tape used for adhering the heat spreader 11 to the chip 10 is mostly made of a thermosetting material, and thus appears to be soft prior to being subjected to a curing process. This makes structure of the chip 10 combined with the heat spreader 11 difficult to be controlled in height, thereby resulting in the foregoing problems due to the top surface 110 of the heat spreader 11 not properly coming into contact with the top wall of the molding cavity. As a result, quality of the fabricated product cannot be assured, as well as costs in fabrication cannot be reduced.
Furthermore, since precise height control is required for the combined structure of the heat spreader 11 and the chip 10, thus the heat spreader 11 cannot be attached to the chip 10 in batch-type manner for fabricating the semiconductor package 1. In other words, the heat spreader 11 has to be one-by-one deposited on the corresponding chip 10, and this therefore increases complexity and time consumption in fabrication, which is not favorable in cost reduction and fabrication efficiency improvement.
Besides, the heat dissipating efficiency of the semiconductor package 1 is proportional to surface area of the exposed top surface 110 of the heat spreader 11; that is, in the case of the semiconductor package 1 remaining intact in size, the heat spreader 11 identical in surface area to the package provides the maximum exposed area, as well as the maximum heat dissipating efficiency. However, when the heat spreader is dimensioned to have the same surface area as the package, edge sides of the heat spreader size needs to be aligned with side walls of the molding cavity. If the heat spreader is oversized due to fabrication inaccuracy, it cannot be successfully placed into the molding cavity; whereas if the heat spreader is undersized, flashes easily occur on the top surface or edge sides thereof. Therefore, such structure is disadvantageous in quality degradation and difficulty in fabrication.
U.S. Pat. No. 5,471,366 discloses another semiconductor package having an exposed heat spreader. In this semiconductor package, the heat spreader is encapsulated by an encapsulant in a molding process; whereas after completing the molding process, part of the encapsulant positioned above the heat spreader is ground until a top surface of the heat spreader being exposed to outside of the encapsulant. Such a disclosure eliminates the foregoing problems in the U.S. Pat. No. 5,726,079, but still have several drawbacks as follows. First, the use of the extra grinding process increases complexity and costs in fabrication for preparing a grinding machine and equipment. Moreover, if warpage occurs in the semi-fabricated package after forming the encapsulant, this degrades planarity of the semi-fabricated package to be ground, thereby making the semi-fabricated package easily damaged in the grinding process, and thus increasing the fabrication cost.
Chinese Patent Application No. 90118118 proposed by the inventor of the present invention discloses a fabrication method of a semiconductor package, so as to effectively improve the foregoing drawbacks in the conventional semiconductor packages having the exposed heat spreaders. This fabrication method comprises the following steps.
First, a heat spreader module plate is attached to a plurality of semiconductor chips mounted on a chip carrier module plate. Then, an interface layer is formed on the heat spreader module plate, allowing adhesion force between the interface layer and an encapsulating compound to be smaller than that between the heat spreader module plate and the encapsulating compound. Subsequently, an encapsulant is formed by the encapsulating compound to entirely encapsulate the chips and the heat spreader module plate. Then, a singulation process is performed to form individual semi-fabricated packages. Finally, residues of the encapsulating compound on the interface layer of the semi-fabricated packages are removed.
However, in the foregoing fabrication method, the interface layer formed on the heat spreader module plate usually has the adhesion force with the encapsulating compound much smaller than that between the heat spreader module plate and the encapsulating compound. When a jig is used to adsorb in vacuum the residues of the encapsulating compound on the interface layer of the semi-fabricated packages in the singulation process, the residues of the encapsulating compound often detach from the semi-fabricated packages under singulation, thereby making the singulated packages dislocated from the jig, and damaging the packages or equipment. Therefore, how to effectively maintain sufficient bonding between the residues of the encapsulating compound and the semiconductor packages during singulation has become a critical problem to solve.
A primary objective of the present invention is to provide a method of making a semiconductor package with a heat spreader, in which semi-fabricated packages can be held in position on a jig in a singulation process, and the heat spreader is dimensioned to have the maximal exposed area with no concern of flashes occurring thereon, so that heat dissipating efficiency can be improved.
Another objective of the invention is to provide a method of making a semiconductor package with a heat spreader, in which the heat spreader is directly attached to a semiconductor chip so as to increase the heat dissipating efficiency, and the chip can be prevented from being damaged in a molding process, so that quality of fabricated products can be assured.
Still another objective of the present invention is to provide a method of making a semiconductor package with a heat spreader, in which the heat spreader is attached to the chip in a batch-type manner, so as to simplify fabrication processes, and reduce time consumption, as well as decrease costs in fabrication.
A further objective of the present invention is to provide a method of making a semiconductor package with a heat spreader, in which there is no concern for controlling height of combined structure of the heat spreader and the chip, thereby making the fabrication cost reduced, and the fabrication quality improved.
A further objective of the present invention is to provide a method of making a semiconductor package with a heat spreader, in which a mold used in the molding process can be applied to difference sized products, and thus it is advantageous in reducing costs for equipment preparation and management.
In accordance with the foregoing and other objectives, the present invention proposes a method of making a semiconductor package with the heat spreader, comprising the steps of: preparing a matrix-type chip carrier module plate consisting of a plurality of array-arranged chip carriers, wherein each of the chip carriers has an upper surface and a lower surface; mounting at least one chip at a predetermined position on the upper surface of each of the chip carriers, and electrically connecting the chip to the chip carrier; providing a heat spreader module plate having an upper surface, and a lower surface attached to the chips mounted on the chip carriers so as to interpose the chips between the chip carrier module plate and the heat spreader module plate, and forming an interface layer on the upper surface of the heat spreader module plate, wherein adhesion force between the interface layer and a molding compound used for forming an encapsulant is larger than that between the interface layer and the heat spreader module plate, as well as adhesion force between the interface layer and the heat spreader module plate is smaller than that between the heat spreader module plate and the molding compound; forming the encapsulant by using the molding compound for encapsulating the heat spreader module plate and the chips; performing a singulation process to form individual semi-fabricated semiconductor packages; and removing residues of the molding compound formed on the interface layer and the interface layer.
Combined structure of the heat spreader module plate, the chips and the chip carrier module plate is smaller in height than a molding cavity of a mold used for forming the encapsulant. In other words, during a molding process, the molding compound forming the encapsulant covers the interface layer on the heat spreader module plate. Since the adhesion force between the interface layer and the molding compound is larger than that between the heat spreader module plate and the interface layer, thus the interface layer and the molding compound formed on the interface layer can be easily removed after forming the encapsulant. Further, since the adhesion force between a heat spreader (formed by singulating the heat spreader module plate) and the encapsulant is larger than that between the heat spreader and the interface layer, the removing process does not lead to delamination occurring between the heat spreader and the encapsulant or the chip. Moreover, since adhesion force between the interface and the molding compound formed on the interface layer is sufficient to firmly maintain the molding compound staying on the interface layer in the singulation process. Furthermore, as the heat spreader module plate does not abut a top wall of the molding cavity of the mold, the chips can be prevented from cracking in the molding process. This also provides flexibility in height for a structure to be encapsulated by using the mold; that is, the same mold can be utilized to perform the molding process for semiconductor packages various in height.
The interface layer on the heat spreader module plate is made of a material such as polyimide tape or thermosetting epoxy resin, which generally has better adhesion force with the encapsulant than with the heat spreader module plate.
In one preferred embodiment of the invention, the chip carrier is a BGA (Ball Grid Array) substrate having at least one opening thereon for allowing bonding wires to pass therethrough so as to electrically connect the substrate to the chip. The substrate is mounted on its surface below the chip with a plurality of solder balls, which are used to provide electrical connection of the chip to external devices.
In another preferred embodiment of the invention, the chip carrier is a flip chip substrate, wherein a plurality of solder pads are array-arranged on a upper surface of the substrate for bonding a plurality of solder bumps thereto so as to electrically connect the chip to the substrate, whereas on a lower surface of the substrate there are implanted a plurality of solder balls for providing electrical connection of the chip to external devices.
In still another preferred embodiment of the invention, the chip carrier is a QFN (quad flat nonlead) lead frame or a BGA substrate, having an upper surface for mounting the chip thereon, and the chip is electrically connected to the lead frame or the substrate via a plurality of bonding wires. In order to avoid damage to the bonding wires caused by attaching a heat spreader to the chip, a connecting portion is formed on a first surface of the heat spreader at a position corresponding to the chip, and extends towards the chip, so as to allow the heat spreader to be connected to the chip by the connecting portion, without coming into contact with the bonding wires.
In a further preferred embodiment of the invention, the chip carrier is a QFN lead frame or a BGA substrate, having an upper surface for mounting the chip thereon, and the chip is electrically connected to the lead frame or the substrate by a plurality of bonding wires. In order to avoid contact with the bonding wires as a heat spreader is directly attached to the chip, and to reduce thermal stress caused by the difference in CTE (coefficient of thermal expansion) between the heat spreader and the chip, a buffer pad having a similar CTE to the chip is used to attach the chip to the heat spreader in a manner that, the buffer pad is interposed between the chip and the heat spreader. Further, in order to optimize the buffer pad to release the thermal stress generated from the heat spreader against the chip, the buffer pad is preferred to be a defective die.
Besides, in order to enhance bonding between the heat spreader and the encapsulant, a first surface of the heat spreader is roughened, corrugated, and made uneven.